SANYO CE28P1C - Service Manual Immediate Download

Part No.

SKSM0268

F2WDMK

SEPT 98

Colour Television

Service Manual

CE28P1-C (W.Europe)

Service Ref. No.

CE28P1-C-00

PRODUCT CODE: 111325303

ORIGINAL VERSION: Chassis No. EB4-A

Give complete "SERVICE REF. NO." for parts order or

servicing, it is shown on the rating sheet on the

cabinet back of the TV set.

Note

This TV receiver will not work properly in foreign

countries where the television transmission system

and power source differ from the design specifications.

Refer to the specifications for the design specifications

Specifications

Power source

AC 220~240V 50Hz

Television system

System B/G

Colour system

PAL

Receiving channel

VHF: E2-E12

CATV: X, Y, Z, S1-S41

UHF: #21~69

Aerial input impedance

75ohm

AV terminal

21 Pin socket

CENELEC standard

Sound output(Music)

12 watts X2

Picture tube

70cm diagonal, 110 degree

(Visible picture diagonal)

66cm

Dimensions (WxHxD)

740 x 585 x 494mm

Weight

31.5 Kg

CE28P1-C

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F2WDMK

SAFETY PRECAUTION

X-RADIATION PRECAUTION

The primary source of X-RADIATION in the television receiver is the picture tube. The picture tube is specially

constructed to limit X-RADIATION emissions. For continued X-RADIATION protection, the replacement tube must

be the same type as the original including suffix letter. Excessive high voltage may produce potentially hazardous

X-RADIATION. To avoid such hazards, the high voltage must be maintained within specified limit. Refer to this

service manual, high voltage adjustment for specific high voltage limit. If high voltage exceeds specified limits,

take necessary corrective action. Carefully follow the instructions for +B1 volt power supply adjustment, and high

voltage adjustment to maintain the high voltage within the specified limits.

PRODUCT SAFETY NOTICE

Product safety should be considered when a component replacement is made in any area of a receiver.

Components indicated by mark //!\ in the parts list and the schematic diagram designate components in which

safety can be of special significance. It is particularly recommended that only parts designated on the parts list in

this manual be used for component replacement designated by mark /!\ . No deviations from resistance wattage

or voltage ratings may be made for replacement items designated by mark /!\ .

1: An isolation transformer should be connected in the

power line between the receiver and the AC line when

a service is performed on the primary of the converter

transformer of the set.

2: Comply with all caution and safety-related notes

provided on the cabinet back, inside the cabinet, on

the chassis or the picture tube.

3: When replacing a chassis in the cabinet, always be

certain that all the protective devices are installed

properly, such as, control knobs, adjustment covers or

shields, barriers, isolation resistor-capacitor networks

etc.Before returning any television to the customer,

the service technician must be sure that it is

completely safe to operate without danger of electrical

shock.

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F2WDMK

BLOCK DIAGRAM

This is a diagram for all models and therefore differs slightly from the actual block diagram.

IC801

CPU

21P

Scart:

AV1

21P

Scart:

AV2

IC201

IF/Video/Chroma/Def.

IC1202

CVBS

int/ext

sw.

CRT

Unit

FBT

IC001

Audio

Output

IC501

Vert.

Output

T611

Converter

Transformer

Power

Supply

Circuit

SIF

Unit

Audio

Unit

Tuner

IC802

Memory

SCL

SDA

Pre.amp

IC810

Band

sw.

Bright

Contranst

Colour

Sharpness

Control

Keys

45/46

28/29

30/31

X131

SAW

Filter

IC271

Delay

R-Y/B-Y

CVBS

Functuin

In(AV1/AV2)

11/12

14/16

BLK

External

CVBS

Internal

CVBS

Q151

Q152/Q154

H-Drive

Q431

Q432

H-Outpit

V-Drive

V-Feedback

Audio

Speakers

VR501

C512

Q2601

Q2611

Q2621

Q171

Out

Audio

I/O

Audio

I/O

Video

I/O

Video

I/O

RGB/BLKIn

B1:

150V

B2:

25V

B3:

15V

B4:

24V

IC651

IC652

B6:

12V

B8:

B7:

10/

Q612

Q613

V-In

CVBS

AudioI/O

SIFIn

Audio

Out

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F2WDMK

1. POWER SUPPLY

The power supply circuit of the EB4-A chassis is

composed of a rectifier smoothing circuit, an oscillation

circuit, a control circuit and an output rectifier circuit. The

AC input voltage is full-wave rectified by the rectifier

smoothing circuit, and an unstable DC voltage is

generated at both terminals of the smoothing capacitor

C607. This voltage is input to the oscillation circuit. The

oscillation circuit is provided with a blocking oscillator

circuit that switches the switching transistor Q613 ON

and OFF, and an oscillation frequency and a duty square

wave pulse are generated in the input windings

according to operation of the control circuit. A square-

wave pulse whose size is dependent on the turn ratio of

the input and output windings is obtained in the output

winding. This is rectified in the output rectifier circuit, and

the desired DC voltage is obtained.

2. IF & DEFLECTION (TDA8361)

The IF output signal from the tuner passes through the

SAW filter, and it is input to pin45 and pin46 of IC201.

The signal input to the IC passes through the IF

amplifier, video detection and video amplifier circuits and

is output from pin7 as a composite video signal. And

after this signal is converted to impedance at Q151,

supplies to the video and chroma amplifier stages.

The sync.-separation circuit separates the video signals

applied to pin13(internal video signal) or pin15(external

video signal) to vertical- and horizontal-sync. signals

respectively. The horizontal oscillator requires no

external components and is fully integrated. The

oscillator is always running when the start-pin36 is

supplied with 8V. Horizontal drive signal is output from

pin37. VR361 is for adjustment of the horizontal centring.

The separated vertical-sync. signal from sync. separation

circuit passes through the vertical-separation circuit, and

applied to trigger divider circuit. The horizontal oscillation

pulse and input vertical sync. pulse are monitored by the

trigger divider circuit, and switching 50Hz and 60Hz

system, the vertical amplitude automatically adjusted for

50Hz and 60Hz. The output signal from the trigger

divider is triggered vertical oscillation circuit consisting of

C351, R352 and pin42, and vertical drive pulse is output

from pin43. VR501 is for changing the amount of AC

feedback applied to pin41 and for adjustment of the

vertical amplitude.

3. VIDEO CHROMA & R.G.B. (TDA8361)

The composite video signal output from the pin7 of

IC101 passes through Q151-Q154, and it is supplied to

pin13. The external video signal output from SCART is

supplied to pin15. The video signal input to pin13 or

pin15 is separated to luminance (Y) signal and chroma

signal in IC201. These pins are used in common with

H/V-sync. separation input. The peaking of Y signal is

adjusted by DC voltage of pin14. ("SHARPNESS"

control) The chroma signal is divided into R-Y and B-Y

chroma signals, demodulated in IC201, and output from

pin30 (R-Y) and pin31 (B-Y). These chroma signals pass

through the 1H delay line circuit (IC271), and they are

input to pin29 (R-Y) and pin28 (B-Y). These R-Y/B-Y

signals pass through RGB matrix circuit and RGB

selector circuit of IC101. The internal RGB signals are

generated in RGB matrix circuit and the RGB selector,

consisting linear amplifiers, clamps and selects either the

internal RGB signals or the external RGB signals input

from pin22(R), pin23(G), pin24(B). Selection is controlled

by the voltage at the RGB switch control (pin21) and

mixed RGB modes are possible since RGB switching is

fast. The RGB switch also functions as a fast blanking

pin by blanking the RGB output stages; here internal and

external RGB signals are overruled. The colour gain is

controlled by DC voltage of pin26. ("COLOUR" control)

The contrast control voltage present at pin25, and the

brightness control voltage present at pin17 controls DC

level of RGB signals. The RGB signals are finally

buffered before being available at the RGB output pins

[pin20 (R), pin19 (G), pin18 (R)].

4. AUDIO OUTPUT(TDA7263M)

The audio signals output from the audio unit are input to

pin1(L) and 5(R) of IC171 and passes through the pre-

amplifier circuit and drive circuit, after which it is input to

the audio amplifier. The audio amplifier is an SEPP

(single-ended, push-pull) OTL type and output to pin8(R)

and 10(L) to directly drive the speakers.

5. VERTICAL OUTPUT (LA7832/LA7832)

An IC (LA7832/LA7833) is used for the vertical output

circuit in this chassis. The vertical drive pulse from pin43

of IC201 is input to pin4 of IC501. This pulse drives

IC501, and vertical scanning is performed. In the first half

of scanning a deflecting current is output from pin2 and

passes through the following path:

VR501/R509. An electric charge is then stored in C512.

an amplifying sawtooth waveform current flows directly to

DY to perform electron beam defection. Next, in the first

half of the banking period the vertical drive pulse

suddenly becomes OFF, and in order to reduce the

current flowing to DY, the current path becomes as

follows by the inductance of DY:

when the charge of DY has dissipated, the current path

prescribed current value is reached, the vertical drive

pulse becomes ON. This completes one cycle.

CIRCUIT DESCRIPTION

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F2WDMK

6. HORIZONTAL OUTPUT

A horizontal oscillation signal is output from pin37 of

IC201 and switches the drive transistor Q431. This

switching signal is current amplified by the drive

transformer T431 and drives the output transistor Q432.

When Q432 becomes ON, an amplifying current flows

defection is performed in the last half of the scanning

period. Next, when Q432 becomes OFF, the charge that

had been stored in DY up to that point releases a

resonance current to the resonant capacitors C421/C423

and charges them. The current stored in C421/C423 is

then flowed back to DY, and an opposite charge is then

stored in DY. This opposite charge then switches the

dumper diode in Q432 ON, the resonance state is

completed, and an amplifying current is then flowed

again directly to DY through the dumper diode. By this

means, deflection in the first half of the scanning period

is performed, and when Q432 becomes ON at the end of

the first half of the scanning period, deflection during the

last half is begun, thus completing one cycle.

In the PCC circuit consisting of Q461 and Q462, the

parabola signal supplied from the vertical circuit is added

at the horizontal output stage and pincushion

compensation is performed by varying the DC voltage

bias. Further, the ABL voltage is feedback to the base of

Q462 to compensate for width variations due to

variations in the beam current.

7. CPU <System and Teletext Control>

Pin description

Pin1: Tuning voltage output

Pin2: Brightness control output (6-bit DAC)

Pin3: Contrast control output (6-bit DAC)

Pin4: Colour control output (6-bit DAC)

Pin5: Sharpness control output(6-bit DAC)

Pin6: Not used (GND)

Pin7: Not used (GND)

Pin8: Power ON/OFF output (H:ON)

Pin9: AFT signal input

Pin10: Option SW1 & Keyboard scan input (DC)

Pin11: Option SW2

Pin12: 50/60Hz switch input (50Hz: Hi)

Pin13: GND

Pin14: TV/AV switch output (TV: Hi)

Pin15: S-VHS switch output (S-VHS: Hi)

Pin16: Option SW3 (2AV: Hi)

Pin17: Function signal input for SCART1

Pin18: Function signal input for SCART2

Pin19: Power LED drive output1

Pin20: Option SW4 & Power LED drive output2

Pin21: Ignore output

Pin22: GND

Pin23: CVBS input0 (Internal)

Pin24: CVBS input1 (Internal/External)

Pin25: Black

Pin26: IREF

Pin27: Odd/Even output

Pin28: GND

Pin29: -

Pin30: V-deflection stop output

Pin31: RGB REF

Pin32: Blue output for OSD

Pin33: Green output for OSD

Pin34: Red output for OSD

Pin35: Blanking output for OSD

Pin36: H-sync. input (Horizontal pulse for OSD)

Pin37: V-sync. input (Vertical pulse for OSD)

Pin38~39: Supply (+5V)

Pin 40: OSC GND

Pin 41: Oscillator input for CPU

Pin 42: Oscillator output for CPU

Pin 43: Reset input

Pin 44: Supply (+5V)

Pin 45: Protect signal input (L:Power circuit defects)

Pin 46: Ident. signal input

Pin 47: R/C signal input

Pin 48: Mute output in no picture

Pin 49: I2C bus SCL (Serial clock)

Pin 50: I2C bus SDA (Serial date)

Pin 51: Option SW5 & Band select output1

Pin 52: Band select output2