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PIONEER CORPORATION
4-1, Meguro 1-Chome, Meguro-ku, Tokyo 153-8654, Japan
PIONEER ELECTRONICS (USA) INC.
P.O.Box 1760, Long Beach, CA 90801-1760 U.S.A.
PIONEER EUROPE NV
Haven 1087 Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE.LTD. 253 Alexandra Road, #04-01, Singapore 159936
C PIONEER CORPORATION 2004
K-ZZA. DEC. 2004 Printed in Japan
ORDER NO.
CRT3394
CD MECHANISM MODULE(S10.1AAC)
CX-3158
Service
Manual
Model
Service Manual
CD Mechanism Module
DEH-P770MP/XN/UC
CRT3333
CXK5617
DEH-P7700MP/XN/EW
CRT3334
CXK5663
DEH-P670MP/XN/UC
CRT3335
CXK5663
DEH-3730MP/XN/EW
CRT3395
CXK5663
DEH-3700MP/XN/EW
DEH-2750MP/XN/GS
CRT3396
CXK5663
DEH-2790MP/XN/ID
DEH-2770MP/XN/CS
DEH-3700MP/XU/UC
CRT3397
CXK5668
DEH-4700MP/XU/EW
CRT3398
CXK5668
DEH-4700MPB/XU/EW
DEH-3750MP/XU/GS
CRT3399
CXK5668
DEH-3770MP/XU/CS
CXK5669
DEH-3750MP/XU/CN
DEH-P470MP/XM/UC
CRT3400
CXK5668
DEH-P4700MP/XM/UC
DEH-P4750MP/XM/GS
CRT3401
CXK5668
DEH-P4790MP/XM/ID
DEH-P4770MP/XM/CS
DEH-P3700MP/XU/UC
CRT3402
CXK5668
- This service manual describes the operation of the CD mechanism module incorporated in models list-
ed in the table below.
- When performing repairs use this manual together with the specific manual for model under repair.
CONTENTS
1. CIRCUIT DESCRIPTIONS ...........................................2
2. MECHANISM DESCRIPTIONS.................................19
3. DISASSEMBLY .........................................................21


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2
1
234
12
34
F
E
D
C
B
A
CX-3158
1. CIRCUIT DESCRIPTIONS
Recently, most CD LSI's have included DAC, RF amplifier and other peripheral circuits, as well as the core circuit DSP.
This series of mechanisms employ a multi-task LSI UPD63763GJ, which has CD-ROM decoder and MP3/WMA decoder
in addition to the CD block as shown in the Fig.1.0.1. This enables to reproduce a CD-ROM where MP3/WMA data is
recorded.
Fig.1.0.1 Block diagram of CD LSI UPD63763GJ
A-F
UPD63763GJ
Audio output
Digital servo
RF amplifier
CD-ROM
decoder
EFM
Signal
processor
Microcomputer
SRAM(1Mbit)
Buffer memory
controller(BMC)
DAC
MP3/WMA
decoder


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3
5
6
7
8
F
E
D
C
B
A
5
6
7
8
CX-3158
1.1 PREAMPLIFIER BLOCK (UPD63763GJ: IC201)
In the preamplifier block, the pickup output signals are processed to generate signals that are used for the next-stage
blocks: the servo block, demodulator, and control.
After I/V-converted by the preamplifier with built-in photo detectors (inside the pickup), the signals are applied to the
preamplifier block in the CD LSI UPD63763GJ (IC201). After added by the RF amplifier in this block, these signals are
used to produce necessary signals such as RF, FE, TE, and TE zero-cross signals.
The CD LSI employs a single power supply system of + 3.3V. Therefore, the REFO (1.65V) is used as the reference volt-
age both for this CD LSI and the pickup. The LSI produces the REFO signal by using the REFOUT via the buffer amplifi-
er and outputs from the pin 133. All the measurements should be made based on this REFO.
Caution: Be careful not to short the REFO and GRD when measuring.
1.1.1 APC (Automatic Power Control)
A laser diode has extremely negative temperature characteristics in optical output at constant-current drive. To keep
the output constant, the LD current is controlled by monitor diodes. This is called the APC circuit. The LD current is
calculated at about 30mA, which is the voltage between LD1 and V3R3D divided by 7.5 (ohms).
Fig. 1.1.1 APC
PICKUP UNIT
CD CORE UNIT
MD
VR
LD-
LD+
5
7
15
14
5
7
15
14
R1
100/16
2SB1132
2R4
x
2
2R7
+
+
-
+
-
+
-
PD
VREF
REG 1.25V
APN
LDS
UPD63763GJ
LD
143
142
6R5K
1K
6R5K
1K
110K
100K
100K
3P


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4
1
234
12
34
F
E
D
C
B
A
CX-3158
1.1.2 RF and RFAGC amplifiers
The photo-detector outputs (A + C) and (B + D) are added, amplified, and equalized inside this LSI, and then provided
as the RF signal from the RFI terminal. The RF signal can be used for eye-pattern check.
The low frequency component of the RFO voltage is:
RFO = (A + B + C + D) x 2
The RFO is used for the FOK generation circuit and RF offset adjustment circuit.
The RFI output from the pin 119 is A/C-coupled outside this LSI, and returned to the pin 118 of this LSI. The signal is
amplified in the RFAGC amplifier to obtain the RFAGC signal. This LSI is equipped with the RFAGC auto-adjustment
function as explained below. This function automatically controls the RFO level to keep at 1.5V by switching the feed-
back gain for the RFAGC amplifier.
The RFO signal is also used for the EFM, DFCT, MIRR, and RFAGC auto-adjustment circuits.
Fig. 1.1.2 RF/AGC/FE
PICKUP UNIT
P3
A+C
13
6
13
6
VREF
VREF
125
10K
15R2K
15R2K
R2
VREF
For RFOK generation
To DEFECT/A3T detection
FE A/D
RFOFF setup
61K
61K
8R8K
35K
111K
8R8K
10K
10K
10K
127
128
126
A
B
D
C
B+D
P8
P4
P2
P9
P7
CD CORE UNIT
UPD63763GJ
+
-
+
-
+
-
+
-
RFOFF setup
+
-
136
FEO
135
FE-
+
-
+
-
20K
11R2K
119
RFO
118
AGCI
7R05K
10K
10K
1R2K
5P
5R6K
4R7K
1R2K
33P
56P
123
RF-
122
RF2-
116
AGCO
121
EQ1
120
EQ2


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5
5
6
7
8
F
E
D
C
B
A
5
6
7
8
CX-3158
1.1.3 Focus error amplifier
The photo-detector outputs (A + C) and (B + D) are applied to the differential amplifier and the error amplifier to obtain
the (A + C - B - D) signal, which is then provided from the pin 91 as the FE signal.
The low frequency component of the FE voltage is:
FE = (A + C - B - D) x 8.8/10k x 111k/61k x 160k/72k
= (A + C - B - D) x 3.5
The FE output shows 1.5Vp-p S-shaped curve based on the REFO. For the next-stage amplifiers, the cutoff frequency
is 14.6kHz.
1.1.4 RFOK
The RFOK circuit generates the RFOK signal, which indicates focus-close timing and focus-close status during the play
mode, and outputs from the pin 55. This signal is shifted to "H" when the focus is closed and during the play mode.
The DC level of the RFI signal is peak-held in the digital block and compared with a certain threshold level to generate
the RFOK signal. Therefore, even on a non-pit area or a mirror-surface area of a disc, the RFOK becomes "H" and the
focus is closed.
This RFOK signal is also applied to the microcomputer via the low-pass filer as the FOK signal, which is used for pro-
tection and RF amplifier gain switching.
1.1.5 Tracking error amplifier
The photo-detector outputs E and F are applied to the differential amplifier and the error amplifier to obtain the (E - F)
signal, and then provided from the pin 136 as the TE signal.
The low frequency component of the TE voltage is:
TEO = (E - F) x 63k/112k x 160k/160k x 181k/45.4k x 160k/80k
= (E - F) x 4.48
The TE output provides the TE waveform of about 1.3Vp-p based on the REFO. For the next-stage amplifiers, the cut-
off frequency is 21.1kHz.
Fig. 1.1.3 TE
P5
VERF
E 11
F
E
F
9
11
9
P6
P1
P10
130
112K
160K
129
112K
160K
160K
63K
80K
161K
45R36K
45R36K
+
-
63K
+
-
+
-
VREF
TEOFF setup
TE A/D
+
-
+
-
+
-
+
-
60K
20K
Inside TEC
139
TEO
138
TE-
140
TE2
141
TEC
47P
6800P
CD CORE UNIT
PICKUP UNIT
UPD63763GJ